One known resistor and its manufacturing method are disclosed in Japanese Laid-open Patent No. H4-102302. The resistor and its manufacturing method of the prior art are explained next with reference to FIGS. 10 to 12B.
FIG. 10 is a sectional view of a resistor of the prior art. As shown in FIG. 10, a first top electrode layer 2 is disposed on both left and right ends of the top face of an insulated substrate 1. A resistance layer 3 is disposed on the insulated substrate 1 so as to partially overlap the first top electrode layer 2. A first protective layer 4 is disposed to cover only the entire face of the resistance layer 3. A trimming groove 5 is provided on the resistance layer 3 and the first protective layer 4 so as to adjust the resistance value. A second protective layer 6 is disposed on the top face of the first protective layer 4. A second top electrode layer 7 is disposed on the top face of the first top electrode layer 2 stretching to the full width of the insulated substrate 1. A side electrode layer 8 is disposed on a side face of the insulated substrate 1. A nickel layer 9 and solder layer 10 are disposed on the surface of the second top electrode layer 7 and the side electrode layer 8. Here, the height of the solder layer 10 is lower than that of the second protective layer 6. In other words, the second protective layer 6 of the resistor of the prior art generally protrudes from the entire resistor.
A manufacturing method of the resistor of the prior art as configured above is explained next with reference to drawings.
FIGS. 11A to 11F are perspective views of the resistor illustrating how the resistor of the prior art is manufactured. First, as shown in FIG. 11A, the first top electrode layer 2 is applied and formed on both left and right ends of the top face of the insulated substrate 1. The resistance layer 3 is then applied and formed on the top face of the insulated substrate 1 so as to partially overlap the first top electrode layer 2. (FIG. 11B)
Then, as shown in FIG. 11C, after applying and forming the first protective layer 4 so as to cover only the entire resistance layer 3, the trimming groove 5 is provided on the resistance layer 3 and the first protective layer 4 by means such as a laser beam to adjust the resistance value of the resistance layer 3 to within a specified allowable resistance.
As shown in FIG. 11D, the second protective layer 6 is applied and formed only on the top face of the first protective layer 4. The second top electrode layer 7 is then applied and formed on the top face of the first top electrode layer 2, stretching to the full width of the insulated substrate 1 (FIG. 11E).
Then, as shown in FIG. 11F, the side electrode layer 8 is applied and formed on the first top electrode layer 2 and the left and right side faces of the insulated substrate 1 so as to electrically connect with the first top electrode layer 2 and the second top electrode layer 7.
Lastly, the surfaces of the second top electrode layer 7 and the side electrode layer 8 are plated with nickel, and then soldered to form the nickel layer and solder layer 10, as shown in FIG. 10, completing the manufacture of the resistor of the prior art.
However, as shown in FIG. 12A, when the above configuration of the resistor of the prior art is soldered to a printed wiring board using the above manufacturing method of the prior art, the resistor is soldered at both the side electrode layer and the bottom, forming a fillet 11. Accordingly, mounting of the conventional resistor by soldering requires a fillet, resulting in the occupation of an area 13 for soldering at the side faces in addition to the component area 12, as shown in FIG. 12B. This means the prior art requires a mounting area 14. Furthermore, as dimensions of components shrink to increase mounting density, the percentage of soldering area in proportion to mounting area grows. This further limits attempts to increase mounting density for making electronic equipment smaller.